Panel displays are commonly used in electronic products. It is known to provide panel displays based on electrophoretic effects. Electrophoretic effects comprise charged particles dispersed in a fluid or liquid medium moving under the influence of an electric field. As an example of the application of the electrophoretic effects, displays may use charged pigment particles dispersed and contained in a dye solution and arranged between a pair of electrodes. The dye solution in which charged pigment particles are dispersed is known as “electrophoretic ink” or “electronic ink.” A display using electrophoretic ink is known as an electrophoretic display (“EPD”). Under the influence of an electric field, the charged pigment particles are attracted to one of two display electrodes. In response, the desired images are displayed.
In recent years, EPD technology was introduced for use in flat panel display. FIGS. 1A and B illustrate a technology using tiny microcapsules filled with electrically charged white particles suspended in a pigmented oil. For example, FIG. 1A illustrates one implementation in which the underlying circuitry controls whether white particles are at the top or bottom of the capsule. In this example, if the white particles are at the top of the capsule, the display appears white to the viewer. On the other hand, if the white particles are at the bottom of the capsule, the viewer sees the color of the oil, as illustrated in FIG. 1B. Therefore, the use of microcapsules allows the display to be used on flexible plastic sheets, as well as on glass.
One feature of EPD technology is that the pixels are bi-stable. That is, the pixels can be maintained in either of two states without a constant supply of power. Another feature of EPD technology is that particles in an EPD panel move in different directions according to control voltages, in order to display different colors. As a result, EPD panels have a response time which is slower than those of other types of flat panel display.
One application of EPD technology, the electronic paper display device, is being developed as a next generation display device to replace liquid crystal display devices, plasma display panels, and organic electro-luminescent display panels. In particular, electronic paper display panels using “electronic ink” are expected to be a replacement, in certain applications, for existing print media such as books, newspapers, magazines, or the like.
An electronic ink display is well suited for use in a flexible display device because the device can be created on a flexible substrate. For example, by creating an electronic ink display device in a panel using a substrate of a flexible material, the electronic ink display device may have the advantages of flexibility, simplicity, and reliability. The electronic ink display device may also provide the means to construct paper-thin reflective displays without use of a backlight, resulting in very low power consumption.
However, the drive system of EPD panels requires high voltage levels. These high voltages can be provided by traditional DC-DC methods. However, low power consumption is an important objective in applications including EPD technologies. As a result, it is desirable to reduce power consumption in these applications.
FIG. 2 illustrates typical drive voltage levels and a waveform for an electrophoretic panel display. Initially, a top transparent “segment” electrode is connected to a first voltage level (V1). The segment electrode is then driven to a second, higher, voltage level (V0) before being returned to V1. For the entire period, a common electrode is always connected to V1.
A second DC-DC method is disclosed by Kurt Muhlemann, in an article entitled “A 30-V Row/Column Driver for Flat-Panel Liquid Crystal Displays.” Muhlemann presents the system architecture used in a STN (twisted-nematic) display driver, which can be slightly modified for use in an electrophoretic panel display (EPD). For example, FIG. 3 shows a high voltage generation circuit 300 with output voltages V0 and V1. The analog buffer 301 is supplied with voltages V0, of a positive value, and Vss, of zero value. In general, voltage V0 may be generated from a regulated charge pump 302 or provided by an external power supply. A resistor ladder 303 is employed to set V1 as a reference voltage level.
The function of analog buffer 301 is to provide a large driving capability for the V1 voltage. Also shown in FIG. 3 is a simplified segment and common (Seg/Com) controller 304. Seg/Com controller 304 consists of a plurality of switches, coupled to a plurality of pixels (only one of which is shown) in the EPD panel. Each pixel may be represented by a capacitor CPIXEL 305. The plurality of switches in Seg/Com controller 304 may be used to connect the pixels of the panel to the different voltage levels, such as V0, V1, or Vss.
However, the voltage generation method disclosed above presents several disadvantages. For example, analog buffer 301 consumes static current. Thus, analog buffer 301 and resistor ladder 303 exhibit current consumption which cannot be reduced even when the driving waveform (as shown in FIG. 2) is not active.
Yet another disadvantage of the above-described voltage generation method is that the electrical charges in the panel's pixel may not be recycled or reused. As mention above, each of the pixels can be represented by a capacitor (CPIXEL) 305.
The structure of FIG. 2, can exhibit charge transfer as shown in FIGS. 4 and 5. FIG. 4 depicts Seg/Com controller 304 as separate elements (segment 406 and common 407). As shown in FIG. 4, during phase 1 of FIG. 2, a segment 406 is connected to a V0 source and charged from V1 to V0. During phase one, common 407 is also connected to V1. During this operation, segment 406 stores charge (Q) as determined by Equation 1.Q=(V0−V1)*CPixel  (Eq. 1)
As shown in FIG. 5, during phase 2 of FIG. 2, the segment 406 is connected to a bias source of V1. At this time, a charge in the segment 406 equal to (V0-V1)*CPIXEL will be discharged. If bias voltage V1 is provided by an analog buffer 301, the charge in the panel's pixel will go to ground (Vss) through analog buffer 301 and be dissipated. Thus, no charge from the pixel can be reused or recycled, thereby resulting in undesirably high current consumption.
This shortcoming has been addressed in U.S. Pat. No. 6,556,177 to Katayama et al. by a charge recycling system 600 for electroluminescent display panel (EL) applications (FIG. 6). The system disclosed by Katayama includes a power supply at V1 and a capacitor 602, which may represent a pixel (CPIXEL). System 600 may also include a capacitor 601, to perform charge recycling. As a result, system 600 of Katayama provides a voltage level that is twice the value of V1.
FIGS. 7A-C show the charge recycling operation of Katayama. As shown in FIG. 7A, during phase 1, a pixel capacitor 602 and recycle capacitor 601 are charged from Vss to V1. During phase 2, switches operate as shown in FIG. 7B, such that the capacitor 601 is connected in series with the power supply (V1). The voltage across capacitor 601 then rises to a level equal to twice the value of V1 (2*V1) and charges the pixel 602 to the same level. During this operation, a charge equal to V1*CPIXEL is transferred to pixel capacitor 602. As shown in FIG. 7C, during phase 3, switches operate as shown, such that pixel capacitor 602 is connected to V1 again. The charge equal to V1*CPIXEL is transferred back and stored in the capacitor 601.
FIGS. 8A-B illustrate the voltage output of capacitor 601 and the waveform EL of pixel 602 as part of the charge recycling system 600 disclosed by Katayama. Initially, as shown in FIG. 8A, during phase 1, switches operate such that capacitor 601 is charged from Vss to V1. During phase 2, as shown in FIG. 8A, switches operate such that capacitor 601 is connected in series with the power supply (V1). Capacitor 601 then rises to a voltage level equal to twice the value of V1 (2*V1). During this operation, a charge equal to V1*CPIXEL is transferred to pixel capacitor 602. During phase 3, the charge equal to V1*CPIXEL is transferred back and stored in the capacitor 601.
As shown in FIG. 8B, during phase 1, pixel capacitor 602 (EL) is charged by a voltage V1. During phase 2, as shown in FIG. 8B, capacitor 601 has a voltage level equal to twice the value of V1 (2*V1) and charges pixel capacitor 602 to the same voltage level (2*V1). During this operation, a charge equal to V1*CPIXEL is transferred to pixel capacitor 602 (EL). As shown in FIG. 8B, during phase 3, the voltage across pixel 602 is once again V1. Accordingly, a charge equal to V1*CPIXEL is transferred from pixel 602 and stored in the capacitor 601.
However, since capacitor 601 disclosed by Katayama is charged to V1 during phase one and employed to generate a voltage level equal to twice the value of V1 (2*V1) at phase two, sources of voltages V1 and 2*V1 do not exist at the same time. FIG. 8 illustrates the waveform EL of pixel capacitor 602 during a charge recycling operation. FIG. 8A shows that the voltage waveform of pixel capacitor 602 is dependent on the operation of the capacitor 601.
FIGS. 8A-B also show the available voltages of this system at each phase. At phases one and three, voltage levels V1 and Vss are available for driving the pixels. At phase two, 2*V1 and Vss levels are available. Due to this voltage availability limitation, only one drive voltage level (either V1 or 2*V1) is available for driving the pixels at any one time.
The output voltages of the DC-DC converter in Katayama are not continuous in time. Using the typical drive waveform for EPD pixels given in FIG. 2 as an example, if V0 and V1 are not available simultaneously from the DC-DC converter in the form of continuous time voltages, a method for driving different pixels in sequence instead of in common will not be possible. Driving different pixels in sequence comprises starting and stopping a drive scheme of, for example V1-V0-V1, for different pixels at different times. Driving different pixels in common comprises starting and stopping the drive scheme for different pixels at the same time.
As such, there is a need for a power efficient charge recycling DC-DC converter system that provides continuous time output voltages.